Volver a resultados
Ficha bibliográfica · Consulta y acceso
Artículo

Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression

Choi Ju Won et al · Wiley · 2025

Acceso abierto disponible
Lectura rápida. Revisá los datos básicos del recurso y luego accedé al contenido desde el botón principal. En esta ficha solo se muestra la información necesaria para identificar la obra, citarla y abrirla.
Publicación seriada

3-D near-field imaging of guided modes in nanophotonic waveguides

Esta publicación seriada contiene 146 contenidos relacionados.

Acceso al recurso

Entrá al contenido desde la opción principal o elegí otra fuente disponible.

DOAJ DOAJ Articles
Entrar por DOAJ
Acceso principal

Acceso abierto disponible

Recurso identificado como acceso abierto, sin confirmar automáticamente si es texto completo directo.
Abrir recurso

Resumen

Descripción general del contenido del recurso.

Optical pulses are essential as information carriers, for driving nonlinear light sources, imaging, the study of attosecond science and 3D printing. In many applications, short pulses are needed. For example, the resolution of imaging methods which utilize short pulses is limited by the temporal width of the pulses, as is the capacity of time division multiplexed data. The temporal compression of optical pulses is an important approach to achieving ultrashort pulses. With the widespread proliferation of silicon photonics and their use in a multitude of applications, an integrated, CMOS-compatible approach for pulse compression would allow its seamless integration with other photonic integrated circuits. In this work, we experimentally demonstrate silicon-based pulse compression fabricated in a CMOS foundry. The first technique utilizes two stages, one for generating self-phase modulation through the Kerr nonlinearity in silicon, and the second for temporal synchronization of the new wavelengths. The second technique leverages Bragg soliton-effect temporal compression. We experimentally demonstrate temporal compression of up to 3.6× and good agreement with numerical calculations. This work represents efficient silicon-on-insulator devices for temporal compression realized using a wafer-scale CMOS foundry process and may therefore be mass manufactured and integrated seamlessly with other photonic and electronic circuits.

Cómo citar

Elegí el formato que necesitás y copiá la referencia al portapapeles.

APA 7

al, C. J. W. E. (2025). Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression. https://doi.org/10.1515/nanoph-2025-0481

MLA

al, Choi Ju Won et. "Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression." 2025. https://doi.org/10.1515/nanoph-2025-0481.

Chicago

al, Choi Ju Won et. 2025. "Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression.". https://doi.org/10.1515/nanoph-2025-0481.

Harvard

al, C. J. W. E. 2025, Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression, Wiley, available at: https://doi.org/10.1515/nanoph-2025-0481 [Accessed 6 Aug. 2026].

Compartir e imprimir

Guardá la ficha, copiá su enlace permanente o imprimila como PDF.

Exportar referencia

Si usás un gestor bibliográfico, podés exportar el registro en los formatos más comunes.

Detalles del recurso

Información bibliográfica útil para confirmar que se trata del material correcto.

Título
Wafer-scale CMOS foundry silicon-on-insulator devices for integrated temporal pulse compression
Autor / colaboradores
Choi Ju Won et al
Editorial
Wiley
Año de publicación
2025
ISSN
2192-8614
ISSN
2192-8614
Idioma
Inglés

Materias

Explorá otros recursos relacionados a partir de estas materias.

Copiado