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Hardware radial basis function neural network automatic generation

Leiva, Lucas et al · SEDICI UNLP · 2011

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This paper presents a parallel architecture for a radial basis function (RBF) neural network used for pattern recognition. This architecture allows defining sub-networks which can be activated sequentially. It can be used as a fruitful classification mechanism in many application fields. Several implementations of the network on a Xilinx FPGA Virtex 4-(xc4vsx25) are presented, with speed and area evaluation metrics. Some network improvements have been achieved by segmenting the critical path. The results expressed in terms of speed and area are satisfactory and have been applied to pattern recognition problems. Facultad de Informática

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APA 7

Leiva, L. E. A. (2011). Hardware radial basis function neural network automatic generation. http://sedici.unlp.edu.ar/handle/10915/9690

MLA

Leiva, Lucas et al. "Hardware radial basis function neural network automatic generation." 2011. http://sedici.unlp.edu.ar/handle/10915/9690.

Chicago

Leiva, Lucas et al. 2011. "Hardware radial basis function neural network automatic generation.". http://sedici.unlp.edu.ar/handle/10915/9690.

Harvard

Leiva, L. E. A. 2011, Hardware radial basis function neural network automatic generation, SEDICI UNLP, available at: http://sedici.unlp.edu.ar/handle/10915/9690 [Accessed 7 Aug. 2026].

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Title
Hardware radial basis function neural network automatic generation
Author / contributors
Leiva, Lucas et al
Publisher
SEDICI UNLP
Publication year
2011
Language
English

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