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A fast CORDIC co-processor architecture for digital signal processing applications

Giacomantone, Javier et al · SEDICI UNLP · 2000

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Author / responsible party
Giacomantone, Javier et al
Publisher
SEDICI UNLP
Year
2000
Language
English

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The coordinate rotational digital computer (CORDIC) is an arithmetic algorithm, which has been used for arithmetic units in the fast computing of elementary functions and for special purpose hardware in programmable logic devices. This paper describes a classification method that can be used for the possible applications of the algorithm and the architecture that is required for fast hardware computing of the algorithm. Área: Redes - Sistemas Operativos - Sistemas de Tiempo Real - Arquitectura de Procesadores Red de Universidades con Carreras en Informática (RedUNCI)

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APA 7

Giacomantone, J. E. A. (2000). A fast CORDIC co-processor architecture for digital signal processing applications. SEDICI UNLP. http://sedici.unlp.edu.ar/handle/10915/23679

MLA

Giacomantone, Javier et al. A fast CORDIC co-processor architecture for digital signal processing applications. SEDICI UNLP, 2000. http://sedici.unlp.edu.ar/handle/10915/23679.

Chicago

Giacomantone, Javier et al. 2000. A fast CORDIC co-processor architecture for digital signal processing applications. SEDICI UNLP. http://sedici.unlp.edu.ar/handle/10915/23679.

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Giacomantone, J. E. A. 2000, A fast CORDIC co-processor architecture for digital signal processing applications, SEDICI UNLP, available at: http://sedici.unlp.edu.ar/handle/10915/23679 [Accessed 7 Aug. 2026].

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Title
A fast CORDIC co-processor architecture for digital signal processing applications
Author / contributors
Giacomantone, Javier et al
Publisher
SEDICI UNLP
Publication year
2000
Language
English

Subjects

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Ciencias Informáticas; Architectures; Computer arithmetic; Algorithms; Hardware; Signal processing
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