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Implementation of boolean neural networks on parallel computers

Carvalho, Andre Carlos Ponce de Leon Ferreira de et al · SEDICI UNLP · 1996

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Author / responsible party
Carvalho, Andre Carlos Ponce de Leon Ferreira de et al
Publisher
SEDICI UNLP
Year
1996
Language
English

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This paper analyses the parallel implementation using networks of transputers of a neural structure belonging to a particular class of neural architectures known as GSN neural networks. These architectures, belonging to the general clasa of RAM-based networks and composed 01 digitally specified processing nodes, have been implemented using different processing topologies, and performance in relatíon to both training and testing efficiency in a practical pattern recognition task has been evaluated. Eje: Redes Neuronales. Algoritmos genéticos Red de Universidades con Carreras en Informática (RedUNCI)

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APA 7

Carvalho, A. C. P. D. L. F. D. E. A. (1996). Implementation of boolean neural networks on parallel computers. SEDICI UNLP. http://sedici.unlp.edu.ar/handle/10915/24161

MLA

Carvalho, Andre Carlos Ponce de Leon Ferreira de et al. Implementation of boolean neural networks on parallel computers. SEDICI UNLP, 1996. http://sedici.unlp.edu.ar/handle/10915/24161.

Chicago

Carvalho, Andre Carlos Ponce de Leon Ferreira de et al. 1996. Implementation of boolean neural networks on parallel computers. SEDICI UNLP. http://sedici.unlp.edu.ar/handle/10915/24161.

Harvard

Carvalho, A. C. P. D. L. F. D. E. A. 1996, Implementation of boolean neural networks on parallel computers, SEDICI UNLP, available at: http://sedici.unlp.edu.ar/handle/10915/24161 [Accessed 8 Aug. 2026].

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Title
Implementation of boolean neural networks on parallel computers
Author / contributors
Carvalho, Andre Carlos Ponce de Leon Ferreira de et al
Publisher
SEDICI UNLP
Publication year
1996
Language
English

Subjects

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Ciencias Informáticas; parallel computers; Implementation of boolean; Parallel; Neural nets; Algorithms
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